48 search results - page 2 / 10 » Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Powe... |
ARVLSI
2001
IEEE
13 years 8 months ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
ISCAS
1995
IEEE
13 years 8 months ago
1995
IEEE
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
VTC
2010
IEEE
13 years 2 months ago
2010
IEEE
This paper reviews recent developments in vehicular radar at 60 GHz and above, with a focus on low cost integrated antennas. We investigate a number of radar and communication ante...
ISVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract—In the nanometer-scale CMOS technology, the gateoxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the...