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ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
14 years 2 months ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda
CDES
2006
240views Hardware» more  CDES 2006»
13 years 6 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh
CCECE
2006
IEEE
13 years 11 months ago
Low-Voltage Low-Power Low-Noise Amplifier for Wireless Sensor Networks
—This work presents a methodology for designing CMOS low-voltage low-power low-noise amplifiers (LNAs) based on the inductively degenerated common-source topology. To demonstrate...
Derek Ho, Shahriar Mirabbasi
ASPDAC
2006
ACM
135views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Robust analytical gate delay modeling for low voltage circuits
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...
Anand Ramalingam, Sreekumar V. Kodakara, Anirudh D...
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
13 years 9 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu