2661 search results - page 2 / 533 » Model Checking Performability Properties |
APN
2003
Springer
13 years 10 months ago
2003
Springer
Model checking by exhaustive state space enumeration is one of the most developed analysis methods for distributed event systems. Its main problem—the size of the state spaces—...
CAV
2005
Springer
13 years 10 months ago
2005
Springer
In this work we study hybrid approaches to LTL symbolic model checking; that is, approaches that use explicit representations of the property automaton, whose state space is often ...
TASE
2007
IEEE
13 years 11 months ago
2007
IEEE
Bounded model checking (BMC) based on SAT has been introduced as a complementary method to BDD-based symbolic model checking of LTL and ACTL properties in recent years. For genera...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...