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FMCAD
2000
Springer
13 years 8 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...
ECBS
2007
IEEE
145views Hardware» more  ECBS 2007»
13 years 8 months ago
Automatic Verification and Performance Analysis of Time-Constrained SysML Activity Diagrams
We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 2 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
ESTIMEDIA
2008
Springer
13 years 6 months ago
Translating data flow to synchronous block diagrams
We propose a method to automatically transform synchronous data flow diagrams into synchronous block diagrams. The idea is to use triggers, a mechanism that allows a block to be f...
Roberto Lublinerman, Stavros Tripakis
ROBOCUP
2007
Springer
159views Robotics» more  ROBOCUP 2007»
13 years 11 months ago
Model Checking Hybrid Multiagent Systems for the RoboCup
Abstract. This paper shows how multiagent systems can be modeled by a combination of UML statecharts and hybrid automata. This allows formal system cation on different levels of ab...
Ulrich Furbach, Jan Murray, Falk Schmidsberger, Fr...