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» Modeling Cache Effects at the Transaction Level
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DATE
1999
IEEE
113views Hardware» more  DATE 1999»
13 years 9 months ago
Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
William Fornaciari, Donatella Sciuto, Cristina Sil...
SUTC
2010
IEEE
13 years 3 months ago
Transaction-Level Modeling for Sensor Networks Using SystemC
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...
Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan...
ASPDAC
2010
ACM
151views Hardware» more  ASPDAC 2010»
13 years 2 months ago
Source-level timing annotation for fast and accurate TLM computation model generation
This paper proposes a source-level timing annotation method for generation of accurate transaction level models for software computation modules. While Transaction Level Modeling ...
Kai-Li Lin, Chen Kang Lo, Ren-Song Tsay
PPOPP
2009
ACM
14 years 5 months ago
Software transactional distributed shared memory
We have developed a transaction-based approach to distributed shared memory(DSM) that supports object caching and generates path expression prefetches. A path expression specifies...
Alokika Dash, Brian Demsky
TECS
2008
122views more  TECS 2008»
13 years 4 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer