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» Modeling Multi-Valued Circuits in SystemC
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ISMVL
2003
IEEE
111views Hardware» more  ISMVL 2003»
13 years 10 months ago
Modeling Multi-Valued Circuits in SystemC
The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area...
Daniel Große, Görschwin Fey, Rolf Drech...
MEMOCODE
2007
IEEE
13 years 11 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
FDL
2003
IEEE
13 years 10 months ago
Analog Circuit Modeling in SystemC
This paper proposes a methodology for the extension of SystemC to mixed signal systems. An oscillator made up of an inverter chain has been used to test the accuracy and stability...
Massimo Conti, Marco Caldari, Simone Orcioni, Gior...
DATE
2003
IEEE
122views Hardware» more  DATE 2003»
13 years 10 months ago
Synthesis of Complex Control Structures from Behavioral SystemC Models
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...
Francesco Bruschi, Fabrizio Ferrandi
DAC
2006
ACM
13 years 11 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan