31 search results - page 1 / 7 » Modeling Techniques and Tests for Partial Faults in Memory D... |
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
: It has always been assumed that fault models in memories are sufficiently precise for specifying the faulty behavior. This means that, given a fault model, it should be possible...
MTDT
2002
IEEE
13 years 10 months ago
2002
IEEE
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
KBSE
2008
IEEE
13 years 11 months ago
2008
IEEE
Flash memory has become virtually indispensable in most mobile devices. In order for mobile devices to successfully provide services to users, it is essential that flash memory b...
FDTC
2010
Springer
13 years 3 months ago
2010
Springer
This paper introduces some new types of optical fault attacks called fault masking attacks. These attacks are aimed at disrupting of the normal memory operation through preventing ...
VTS
1996
IEEE
13 years 9 months ago
1996
IEEE
In this paper we investigate optimal voltage testing approaches for physically-based faults in CMOS circuits. We describe the general nature of the problem and then focus on two f...