188 search results - page 2 / 38 » Modeling of Interconnection Networks in Massively Parallel P... |
CF
2007
ACM
13 years 9 months ago
2007
ACM
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
JSA
2010
12 years 12 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
ERSA
2010
13 years 3 months ago
2010
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...
IJCNN
2007
IEEE
13 years 11 months ago
2007
IEEE
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...