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» Modelling Evolvable Systems: A Temporal Logic View
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ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
13 years 9 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
MM
2009
ACM
195views Multimedia» more  MM 2009»
13 years 11 months ago
The effectiveness of intelligent scheduling for multicast video-on-demand
As more and more video content is made available and accessed on-demand, content and service providers face challenges of scale. Today’s delivery mechanisms, especially unicast,...
Vaneet Aggarwal, A. Robert Calderbank, Vijay Gopal...
VISUALIZATION
1992
IEEE
13 years 9 months ago
Display of Scientific Data Structures for Algorithm Visualization
algorithms as networks of modules. The data flow architecture is popular because of the flexibility of mixing calculation modules with display modules, and because of its easy grap...
William L. Hibbard, Charles R. Dyer, Brian E. Paul
ASE
2005
137views more  ASE 2005»
13 years 5 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund
POPL
2005
ACM
14 years 5 months ago
Transition predicate abstraction and fair termination
on Predicate Abstraction and Fair Termination Andreas Podelski Andrey Rybalchenko Max-Planck-Institut f?ur Informatik Saarbr?ucken, Germany Predicate abstraction is the basis of m...
Andreas Podelski, Andrey Rybalchenko