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» Models for Embedded Application Mapping onto NoCs: Timing An...
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ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
13 years 10 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis
ICCAD
2007
IEEE
113views Hardware» more  ICCAD 2007»
13 years 11 months ago
The FAST methodology for high-speed SoC/computer simulation
— This paper describes the FAST methodology that enables a single FPGA to accelerate the performance of cycle-accurate computer system simulators modeling modern, realistic SoCs,...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
14 years 5 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
TSP
2008
118views more  TSP 2008»
13 years 4 months ago
Analytical Rate-Distortion-Complexity Modeling of Wavelet-Based Video Coders
Analytical modeling of the performance of video coders is essential in a variety of applications, such as power-constrained processing, complexity-driven video streaming, etc., whe...
Brian Foo, Yiannis Andreopoulos, Mihaela van der S...