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SBACPAD
2007
IEEE
554views Hardware» more  SBACPAD 2007»
13 years 10 months ago
Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors
Rafael Ubal, Julio Sahuquillo, Salvador Petit, Ped...
ESM
2000
13 years 6 months ago
SEP: Simulation framework to evaluate digital hardware architectures
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to ...
Frédéric Mallet, Fernand Boér...
JSS
2006
104views more  JSS 2006»
13 years 4 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
CAMP
2005
IEEE
13 years 6 months ago
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
Domenico Barretta, Gianluca Palermo, Mariagiovanna...
ICPP
2008
IEEE
13 years 11 months ago
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
Sangyeun Cho, Socrates Demetriades, Shayne Evans, ...