29 search results - page 2 / 6 » Multiple Instruction Stream Control for an Associative Model... |
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
PDPTA
2007
13 years 6 months ago
2007
- The MASC (for Multiple Associative Computing) model is a SIMD model enhanced with associative properties and multiple synchronous instruction streams (IS). A number of algorithms...
APCSAC
2003
IEEE
13 years 8 months ago
2003
IEEE
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...