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ISMVL
2008
IEEE
111views Hardware» more  ISMVL 2008»
13 years 11 months ago
Multiple Valued Logic Using 3-State Quantum Dot Gate FETs
Abstract—This paper presents fundamental logic structures designed using novel quantum dot gate FETs with three-state characteristics. This three-state FET manifests itself as a ...
John A. Chandy, Faquir C. Jain
TC
1998
13 years 4 months ago
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
Alejandro F. González, Pinaki Mazumder