15 search results - page 1 / 3 » Multiplexed redundant execution: A technique for efficient f... |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
GLVLSI
2010
IEEE
13 years 5 months ago
2010
IEEE
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
TPDS
2008
13 years 4 months ago
2008
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
DSN
2007
IEEE
13 years 11 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...