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DAC
1994
ACM
13 years 9 months ago
A Modular Partitioning Approach for Asynchronous Circuit Synthesis
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
Ruchir Puri, Jun Gu
GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
13 years 9 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan
TVLSI
2002
366views more  TVLSI 2002»
13 years 5 months ago
Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits
Gate diffusion input (GDI)--a new technique of low-power digital combinatorial circuit design--is described. This technique allows reducing power consumption, propagation delay, an...
Arkadiy Morgenshtein, Alexander Fish, Israel A. Wa...
IJCSS
2007
133views more  IJCSS 2007»
13 years 5 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja
CASES
2001
ACM
13 years 9 months ago
Pattern matching in reconfigurable logic for packet classification
We describe a digital circuit synthesis algorithm specialized for the domain of pattern matching circuits implemented in reconfigurable logic. We propose to use this algorithm as ...
Adam Johnson, Kenneth Mackenzie