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» Nanocompilation for the Cell Matrix Architecture
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CDES
2008
90views Hardware» more  CDES 2008»
13 years 6 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
CDES
2010
184views Hardware» more  CDES 2010»
13 years 2 months ago
Delay-Insensitive Cell Matrix
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...
Scott Smith, David Roclin, Jia Di
INFOCOM
2000
IEEE
13 years 9 months ago
On the Stability of Input-Buffer Cell Switches with Speed-Up
— We consider cell-based switch architectures, whose internal switching matrix does not provide enough speed to avoid input buffering. These architectures require a scheduling al...
Marco Ajmone Marsan, Emilio Leonardi, Marco Mellia...
SAMOS
2010
Springer
13 years 3 months ago
A Polymorphic Register File for matrix operations
—Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization whic...
Catalin Bogdan Ciobanu, Georgi Kuzmanov, Georgi Ga...
CLUSTER
2007
IEEE
13 years 11 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...