49 search results - page 1 / 10 » Neural Compiler Technology for a Parallel Architecture |
PDPTA
1996
13 years 6 months ago
1996
ARCS
1997
Springer
13 years 9 months ago
1997
Springer
Before it can achieve wide acceptance, parallelcomputation must be made significantlyeasier to program. One ain obstacles to this goal is the current usage of memory, both abstra...
SIGPLAN
2008
13 years 4 months ago
2008
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers,...
LCPC
1995
Springer
13 years 8 months ago
1995
Springer
Heterogeneous parallel systems incorporate diverse models of parallelism within a single machine or across machines and are better suited for diverse applications 25, 43, 30]. Thes...