Sciweavers

947 search results - page 3 / 190
» New Delay Analysis in High Speed Networks
Sort
View
ICDCSW
2003
IEEE
13 years 11 months ago
Dynamic Resource Control for High-Speed Downlink Packet Access Wireless Channel
It is a challenging task to provide Quality of Service (QoS) control for a shared high-speed downlink packet access (HSDPA) wireless channel. In this paper, we first propose a ne...
Huai-Rong Shao, Chia Shen, Daqing Gu, Jinyun Zhang...
INFOCOM
2006
IEEE
14 years 10 days ago
A Compound TCP Approach for High-Speed and Long Distance Networks
—Many applications require fast data transfer over high speed and long distance networks. However, standard TCP fails to fully utilize the network capacity due to the limitation ...
Kun Tan, Jingmin Song, Qian Zhang, Murari Sridhara...
INFOCOM
1995
IEEE
13 years 9 months ago
A Fast Bypass Algorithm for High-Speed Networks
In this work we suggest an algorithm that increases the reservation success probability for bursty tra c in high speed networks by adding exibility to the construction of the rout...
Israel Cidon, Raphael Rom, Yuval Shavitt
HPCA
2011
IEEE
12 years 10 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
DATE
2002
IEEE
95views Hardware» more  DATE 2002»
13 years 11 months ago
Optimal Transistor Tapering for High-Speed CMOS Circuits
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
Li Ding 0002, Pinaki Mazumder