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DAC
1989
ACM
13 years 9 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
AAAI
1994
13 years 6 months ago
GENET: A Connectionist Architecture for Solving Constraint Satisfaction Problems by Iterative Improvement
New approaches to solving constraint satisfaction problems using iterative improvement techniques have been found to be successful on certain, very large problems such as the mill...
Andrew J. Davenport, Edward P. K. Tsang, Chang J. ...
VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
13 years 9 months ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
CORR
2006
Springer
116views Education» more  CORR 2006»
13 years 5 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
DAC
1999
ACM
14 years 6 months ago
Behavioral Synthesis Techniques for Intellectual Property Protection
? The economic viability of the reusable core-based design paradigm depends on the development of techniques for intellectual property protection. We introduce the first dynamic wa...
Inki Hong, Miodrag Potkonjak