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DAC
1996
ACM
13 years 9 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
13 years 9 months ago
Automatic Abstraction for Worst-Case Analysis of Discrete Systems
c Abstraction for Worst-Case Analysis of Discrete Systems Felice Balarin Cadence Berkeley Laboratories Recently, a methodology for worst-case analysis of discrete systems has been...
Felice Balarin
FMSD
2007
110views more  FMSD 2007»
13 years 5 months ago
Exploiting interleaving semantics in symbolic state-space generation
Symbolic techniques based on Binary Decision Diagrams (BDDs) are widely employed for reasoning about temporal properties of hardware circuits and synchronous controllers. However, ...
Gianfranco Ciardo, Gerald Lüttgen, Andrew S. ...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 2 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
SAS
2010
Springer
149views Formal Methods» more  SAS 2010»
13 years 3 months ago
Boxes: A Symbolic Abstract Domain of Boxes
Symbolic Abstract Domain of Boxes Arie Gurfinkel and Sagar Chaki Carnegie Mellon University Abstract. Numeric abstract domains are widely used in program analyses. The simplest nu...
Arie Gurfinkel, Sagar Chaki