30 search results - page 2 / 6 » ODE: output direct state machine encoding |
ITC
1999
IEEE
13 years 9 months ago
1999
IEEE
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
ACL2
2006
ACM
13 years 11 months ago
2006
ACM
We describe a new procedure for verifying ACL2 properties about finite state machines (FSMs) using satisfiability (SAT) solving. We present an algorithm for converting ACL2 conj...
STOC
2006
ACM
14 years 5 months ago
2006
ACM
We consider the problem of bounded-error quantum state identification: given either state 0 or state 1, we are required to output `0', `1' or `?' ("don't ...
ESORICS
2002
Springer
14 years 5 months ago
2002
Springer
We introduce the ISM approach, a framework for modeling and verifying reactive systems in a formal, even machine-checked, way. The framework has been developed for applications in ...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...