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DATE
2005
IEEE
169views Hardware» more  DATE 2005»
13 years 11 months ago
Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems
In this paper we present an approach to the design optimization of faulttolerant embedded systems for safety-critical applications. Processes are statically scheduled and communic...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
13 years 9 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
CODES
2007
IEEE
14 years 11 days ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...
ICCCN
2007
IEEE
14 years 11 days ago
Design Techniques for Streamlined Integration and Fault Tolerance in a Distributed Sensor System for Line-crossing Recognition
Abstract — Distributed sensor system applications (e.g., wireless sensor networks) have been studied extensively in recent years. Such applications involve resource-limited embed...
Chung-Ching Shen, Roni Kupershtok, Shuvra S. Bhatt...
CODES
2010
IEEE
13 years 2 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...