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» On Optimal Irregular Switch Box Designs
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FPL
2004
Springer
100views Hardware» more  FPL 2004»
13 years 8 months ago
On Optimal Irregular Switch Box Designs
In this paper, we develop a unified theory in analyzing optimal switch box design problems, particularly for the unsolved irregular cases, where different pin counts are allowed on...
Hongbing Fan, Yu-Liang Wu, Chak-Chung Cheung, Jipi...
ARC
2007
Springer
169views Hardware» more  ARC 2007»
13 years 11 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
13 years 9 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
IPPS
2009
IEEE
13 years 11 months ago
Implementing and evaluating multithreaded triad census algorithms on the Cray XMT
Commonly represented as directed graphs, social networks depict relationships and behaviors among social entities such as people, groups, and organizations. Social network analysi...
George Chin Jr., Andrès Márquez, Sut...
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
13 years 11 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar