534 search results - page 105 / 107 » On Scheduling Parallel Tasks at Twilight |
EUROPAR
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
PDCAT
2009
Springer
14 years 20 days ago
2009
Springer
Abstract—In this paper, a tool named CheCUDA is designed to checkpoint CUDA applications that use GPUs as accelerators. As existing checkpoint/restart implementations do not supp...
ISCA
2006
IEEE
14 years 5 days ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
PPOPP
2003
ACM
13 years 11 months ago
2003
ACM
Simultaneous multithreading (SMT) represents a fundamental shift in processor capability. SMT's ability to execute multiple threads simultaneously within a single CPU offers ...
DAC
2008
ACM
13 years 8 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...