88 search results - page 1 / 18 » On load latency in low-power caches |
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
The size and speed of first-level caches and SRAMs of embedded processors continue to increase in response to demands for higher performance. In power-sensitive devices like PDAs a...
PIMRC
2008
IEEE
13 years 11 months ago
2008
IEEE
Sensor network applications are generally characterized by long idle durations and intermittent communication patterns. The traffic loads are typically so low that overall idle d...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional late...