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DATE
2006
IEEE
110views Hardware» more  DATE 2006»
13 years 10 months ago
Layout driven data communication optimization for high level synthesis
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer...
TCAD
2010
121views more  TCAD 2010»
12 years 11 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
TCAD
2011
12 years 11 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
DAC
1989
ACM
13 years 8 months ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight
ICES
2003
Springer
151views Hardware» more  ICES 2003»
13 years 9 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...