2607 search results - page 1 / 522 » On the Architecture of System Verification Environments |
HVC
2007
Springer
13 years 8 months ago
2007
Springer
Implementations of computer systems comprise many layers and employ a variety of programming languages. Building such systems requires support of an often complex, accompanying too...
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
DAC
1996
ACM
13 years 9 months ago
1996
ACM
Concurrent verification of hardware and software as part of the development process can shorten the time to market of complex systems. The objectives of the Virtual CPU approach i...
FLAIRS
2000
13 years 6 months ago
2000
The paper presents a survey of the VSE system, a kind of CASE-tool for formal software development. It is a summary of a tutorial presentation describing methodology, formalisms, ...
CBSE
2006
Springer
13 years 8 months ago
2006
Springer
We present a novel approach which facilitates formal verification of component-based software application families using model checking. This approach enables effective composition...