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» On the Complexity of Circuit Satisfiability
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DATE
2007
IEEE
85views Hardware» more  DATE 2007»
13 years 12 months ago
QuteSAT: a robust circuit-based SAT solver for complex circuit structure
We propose a robust circuit-based Boolean Satisfiability (SAT) solver, QuteSAT, that can be applied to complex circuit netlist structure. Several novel techniques are proposed in ...
Chi-An Wu, Ting-Hao Lin, Chih-Chun Lee, Chung-Yang...
DAC
2008
ACM
14 years 6 months ago
Bi-decomposing large Boolean functions via interpolation and satisfiability solving
Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA, XB, XC on X if it can be written...
Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung
FOCS
1999
IEEE
13 years 10 months ago
On the Complexity of SAT
We show1 that non-deterministic time NTIME(n) is not contained in deterministic time n 2and polylogarithmic space, for any > 0. This implies that (infinitely often) satisfiabi...
Richard J. Lipton, Anastasios Viglas
CL
2000
Springer
13 years 9 months ago
Towards an Efficient Tableau Method for Boolean Circuit Satisfiability Checking
Boolean circuits offer a natural, structured, and compact representation of Boolean functions for many application domains. In this paper a tableau method for solving satisfiabilit...
Tommi A. Junttila, Ilkka Niemelä
ASYNC
2002
IEEE
114views Hardware» more  ASYNC 2002»
13 years 10 months ago
Checking Delay-Insensitivity: 104 Gates and Beyond
Wire and gate delays are accounted to have equal, or nearly equal, effect on circuit behavior in modern design techniques. This paper introduces a new approach to verify circuits ...
Alex Kondratyev, Oriol Roig, Lawrence Neukom, Karl...