115 search results - page 1 / 23 » On the Design of IEEE Compliant Floating Point Units |
ARITH
1997
IEEE
13 years 9 months ago
1997
IEEE
Engineering design methodology recommends designing a system as follows: Start with an unambiguous speci cation, partition the system into blocks, specify the functionality of eac...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
CHARME
2001
Springer
13 years 8 months ago
2001
Springer
We report on the formal verification of the floating point unit used in the VAMP processor. The FPU is fully IEEE compliant, and supports denormals and exceptions in hardware. The ...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
FPGAs have reached densities that can implement floatingpoint applications, but floating-point operations still require a large amount of FPGA resources. One major component of IE...
ARITH
2005
IEEE
13 years 10 months ago
2005
IEEE
We are proposing a micro-architecture for highperformance IEEE floating-point addition that is based on a (non-redundant)high-radix representation of the floatingpoint operands....