11 search results - page 1 / 3 » On the Interaction Between Power-Aware FPGA CAD Algorithms |
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
This paper surveys different implementations of dividers on FPGA technology. A special attention is paid on ATP (area-time-power) trade-offs between restoring, non-restoring, and S...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
— This paper addresses the problem of designing a power-aware Multiple Access Control (MAC) protocol for Multihop Wireless Networks (MHWN). The problem is formulated as a cross l...
BMAS
2000
IEEE
13 years 9 months ago
2000
IEEE
This article introduces the concept of combining both form (CAD models) and behavior (simulation models) of mechatronic system components into component objects. By composing thes...