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» On the Limitations of Power Macromodeling Techniques
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ISCAS
2002
IEEE
110views Hardware» more  ISCAS 2002»
13 years 10 months ago
Incorporation of input glitches into power macromodeling
Previous research on power macromodeling has always assumed glitch-free input signals. However, in an actual operating environment, the input signals of a circuit can contain glit...
Xun Liu, Marios C. Papaefthymiou
DAC
2002
ACM
14 years 6 months ago
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery
This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we devel...
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Ch...
DAC
2006
ACM
13 years 11 months ago
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming
We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique and effective radius of decoupling capacitan...
Min Zhao, Rajendran Panda, Savithri Sundareswaran,...
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 2 months ago
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Ch...
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
Seongmoon Wang, Wenlong Wei