12 search results - page 1 / 3 » On the Optimization Power of Redundancy Addition and Removal... |
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...
ICCD
1996
IEEE
13 years 9 months ago
1996
IEEE
For circuits where there may be latches with no reset line, we show how to replace some of them with combinational logic. All previous work in sequential optimization by latch rem...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
—Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis and optimization of logic designs. It can remove an existing target wire and add an alte...
DAC
2010
ACM
12 years 12 months ago
2010
ACM
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
TC
2010
13 years 3 months ago
2010
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...