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» On the analysis of digital circuits with uncertain inputs
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ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 8 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
13 years 9 months ago
Stochastic Modeling and Performance Evaluation for Digital Clock and Data Recovery Circuits
Clock and data recovery circuits are essential components in communication systems. They directly influence the bit-error-rate performance of communication links. It is desirable...
Alper Demir, Peter Feldmann
IJCNN
2000
IEEE
13 years 9 months ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa
BIRTHDAY
2003
Springer
13 years 10 months ago
Digital Algebra and Circuits
Abstract. Digital numbers D are the world’s most popular data representation: nearly all texts, sounds and images are coded somewhere in time and space by binary sequences. The m...
Jean Vuillemin
DNA
2009
Springer
173views Bioinformatics» more  DNA 2009»
13 years 12 months ago
Time-Complexity of Multilayered DNA Strand Displacement Circuits
Recently we have shown how molecular logic circuits with many components arranged in multiple layers can be built using DNA strand displacement reactions. The potential application...
Georg Seelig, David Soloveichik