Sciweavers

20 search results - page 3 / 4
» On the computational power of Boolean decision lists
Sort
View
VLSID
2006
IEEE
121views VLSI» more  VLSID 2006»
14 years 5 months ago
An Integrated Approach for Combining BDD and SAT Provers
Many formal verification tools today are based on Boolean proof techniques. The two most powerful approaches in this context are Binary Decision Diagrams (BDDs) and methods based ...
Rolf Drechsler, Görschwin Fey, Sebastian Kind...
VLSID
2005
IEEE
97views VLSI» more  VLSID 2005»
13 years 11 months ago
Q-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs
In recent years, there has been an increasing interest in Quantified Boolean Formula (QBF) evaluation, since several VLSI CAD problems can be formulated efficiently as QBF insta...
Kameshwar Chandrasekar, Michael S. Hsiao
CODES
2003
IEEE
13 years 10 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
CSL
2008
Springer
13 years 7 months ago
Quantitative Languages
Quantitative generalizations of classical languages, which assign to each word a real number instead of a boolean value, have applications in modeling resource-constrained computat...
Krishnendu Chatterjee, Laurent Doyen, Thomas A. He...
CONCUR
2010
Springer
13 years 6 months ago
Mean-Payoff Automaton Expressions
Abstract. Quantitative languages are an extension of boolean languages that assign to each word a real number. Mean-payoff automata are finite automata with numerical weights on tr...
Krishnendu Chatterjee, Laurent Doyen, Herbert Edel...