35 search results - page 7 / 7 » On-chip Stack Based Memory Organization for Low Power Embedd... |
GLVLSI
2005
IEEE
13 years 11 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
SAC
2005
ACM
13 years 11 months ago
2005
ACM
The launch of new features for mobile phones is increasing and the product life cycle symmetrically decreasing in duration as higher levels of sophistication are reached. Therefor...
MOBISYS
2007
ACM
14 years 5 months ago
2007
ACM
The ease of deployment of battery-powered and mobile systems is pushing the network edge far from powered infrastructures. A primary challenge in building untethered systems is of...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
SENSYS
2004
ACM
13 years 11 months ago
2004
ACM
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...