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ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
13 years 11 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
IPPS
2010
IEEE
13 years 4 months ago
Performance and energy optimization of concurrent pipelined applications
In this paper, we study the problem of finding optimal mappings for several independent but concurrent workflow applications, in order to optimize performance-related criteria tog...
Anne Benoit, Paul Renaud-Goud, Yves Robert
DASIP
2010
13 years 1 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
HIPC
2005
Springer
13 years 11 months ago
Scheduling Divisible Loads with Return Messages on Heterogeneous Master-Worker Platforms
Abstract In this paper, we consider the problem of scheduling divisible loads onto an heterogeneous star platform, with both heterogeneous computing and communication resources. We...
Olivier Beaumont, Loris Marchal, Yves Robert
JRTIP
2008
249views more  JRTIP 2008»
13 years 6 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...