5 search results - page 1 / 1 » Optimal Spare Utilization in Repairable and Reliable Memory ... |
MTDT
2003
IEEE
13 years 10 months ago
2003
IEEE
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...
VEE
2010
ACM
13 years 10 months ago
2010
ACM
Crash dump, or core dump is the typical way to save memory image on system crash for future offline debugging and analysis. However, for typical server machines with likely abund...
TC
2010
13 years 3 months ago
2010
—Reliability analysis has become a tool of fundamental importance to virtually all electrical and computer engineers because of the extensive usage of hardware systems in safety ...
NOCS
2009
IEEE
14 years 4 days ago
2009
IEEE
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...