Sciweavers

106 search results - page 2 / 22
» Optimal Vector Selection for Low Power BIST
Sort
View
WIOPT
2010
IEEE
13 years 3 months ago
Low complexity algorithms for relay selection and power control in interference-limited environments
Abstract—We consider an interference-limited wireless network, where multiple source-destination pairs compete for the same pool of relay nodes. In an attempt to maximize the sum...
Lazaros Gkatzikis, Iordanis Koutsopoulos
CSREAESA
2007
13 years 7 months ago
The Effect of Nanometer-Scale Technologies on the Cache Size Selection for Low Energy Embedded Systems
- Several studies have shown that cache memories account for more than 40% of the total energy consumed in processor-based embedded systems. In microscale technology nodes, active ...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
ARVLSI
1995
IEEE
220views VLSI» more  ARVLSI 1995»
13 years 9 months ago
Optimization of combinational and sequential logic circuits for low power using precomputation
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...
José Monteiro, John Rinderknecht, Srinivas ...
ICC
2007
IEEE
141views Communications» more  ICC 2007»
13 years 12 months ago
A Decomposition-Based Low-Complexity Scheduling Scheme for Power Minimization under Delay Constraints in Time-Varying Uplink Cha
Abstract— In this paper, we investigate the problem of minimizing the average transmission power of users while guaranteeing the average delay constraints in time-varying uplink ...
Hojoong Kwon, Byeong Gi Lee
DAC
2004
ACM
14 years 6 months ago
Design optimizations for microprocessors at low temperature
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with...
Arman Vassighi, Ali Keshavarzi, Siva Narendra, Ger...