Sciweavers

54 search results - page 10 / 11
» Optimal simultaneous mapping and clustering for FPGA delay o...
Sort
View
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
13 years 9 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 8 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat
GIS
2008
ACM
14 years 6 months ago
Low-cost orthographic imagery
Commercial aerial imagery websites, such as Google Maps, MapQuest, Microsoft Virtual Earth, and Yahoo! Maps, provide high- seamless orthographic imagery for many populated areas, ...
Peter Pesti, Jeremy Elson, Jon Howell, Drew Steedl...
ISVC
2009
Springer
13 years 11 months ago
LightShop: An Interactive Lighting System Incorporating the 2D Image Editing Paradigm
Lighting is a fundamental and important process in the 3D animation pipeline. Conventional lighting workflow is time-consuming and labor-intensive. A user must fiddle with a rang...
Younghui Kim, Junyong Noh
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
12 years 5 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...