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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 10 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
RTCSA
2000
IEEE
13 years 10 months ago
Extensions to optimistic concurrency control with time intervals
Although an optimistic approach has been shown to be better suited than locking protocols for real-time database systems (RTDBS), it has the problems of unnecessary restarts and h...
Jan Lindström
COORDINATION
2004
Springer
13 years 11 months ago
Optimistic Concurrency Semantics for Transactions in Coordination Languages
There has been significant recent interest in exploring the role of coordination languages as middleware for distributed systems. These languages provide operations that allow pro...
Suresh Jagannathan, Jan Vitek
RTCSA
2000
IEEE
13 years 10 months ago
Using importance of transactions and optimistic concurrency control in firm real-time databases
In a real-time database system, it is difficult to meet all timing constraints due to the consistency requirements of the underlying database. However, when the transactions in t...
Jan Lindström, Kimmo E. E. Raatikainen
TKDE
1998
139views more  TKDE 1998»
13 years 5 months ago
Distributed Optimistic Concurrency Control Methods for High-Performance Transaction Processing
—There is an ever-increasing demand for more complex transactions and higher throughputs in transaction processing systems leading to higher degrees of transaction concurrency an...
Alexander Thomasian