36 search results - page 3 / 8 » Optimization of Instruction Fetch Mechanisms for High Issue ... |
ISCA
2003
IEEE
13 years 10 months ago
2003
IEEE
On a N-way issue superscalar processor, the front end instruction fetch engine must deliver instructions to the execution core at a sustained rate higher than N instructions per c...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
Exponentially rising cooling/packaging costs due to high power density call for architectural and software-level thermal management. Dynamic thermal management (DTM) techniques co...
ISCA
1995
IEEE
13 years 8 months ago
1995
IEEE
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due ...
HPCA
2003
IEEE
14 years 5 months ago
2003
IEEE
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...