Sciweavers

    155 search results - page 1 / 31
    » Optimizations for a Highly Cost-Efficient Programmable Logic...
    Sort
    View
    FPGA
    1998
    ACM
    148views FPGA» more  FPGA 1998»
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    13 years 8 months ago
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    Download  www.cs.york.ac.uk
    Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Ch...
    claim paper
    Read More »
    IADIS
    2009
    198views Internet Technology» more  IADIS 2009»
    A strategy for cost efficient distributed data storage for in-memory OLAP
    13 years 2 months ago
    A strategy for cost efficient distributed data storage for in-memory OLAP
    Download  www.andyross.net
    With the availability of inexpensive blade servers featuring 32 GB or more of main memory, memory-based engines such as the SAP NetWeaver Business Warehouse Accelerator are coming...
    Olga Mordvinova, Oleksandr Shepil, Thomas Ludwig 0...
    claim paper
    Read More »
    FPGA
    2005
    ACM
    156views FPGA» more  FPGA 2005»
    Design of programmable interconnect for sublithographic programmable logic arrays
    13 years 10 months ago
    Design of programmable interconnect for sublithographic programmable logic arrays
    Download  ic.ese.upenn.edu
    Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
    André DeHon
    claim paper
    Read More »
    ASAP
    2004
    IEEE
    126views Hardware» more  ASAP 2004»
    Hyper-Programmable Architectures for Adaptable Networked Systems
    13 years 8 months ago
    Hyper-Programmable Architectures for Adaptable Networked Systems
    Download  www.kandeco.com
    We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
    Gordon J. Brebner, Philip James-Roxby, Eric Keller...
    claim paper
    Read More »
    FPGA
    2006
    ACM
    141views FPGA» more  FPGA 2006»
    A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
    13 years 8 months ago
    A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
    Download  pavel.physics.sunysb.edu
    This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
    Dmitri B. Strukov, Konstantin Likharev
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.