11 search results - page 1 / 3 » Optimized address assignment for DSPs with SIMD memory acces... |
ASPDAC
2001
ACM
13 years 8 months ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
ICESS
2007
Springer
13 years 10 months ago
2007
Springer
Compact code generation is very important for an embedded system that has to be implemented on a chip with a severely limited amount of size. Even though on-chip data memory optimi...
CC
2003
Springer
13 years 9 months ago
2003
Springer
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
ICPP
2003
IEEE
13 years 9 months ago
2003
IEEE
Automatic optimization of address offset assignment for DSP applications, which reduces the number of address arithmetic instructions to meet the tight memory size restrictions an...