43 search results - page 3 / 9 » Optimizing Nested Loops with Iterational and Instructional R... |
IJPP
1998
13 years 5 months ago
1998
This paper applies unimodular transformations and tiling to improve data locality of a loop nest. Due to data dependences and reuse information, not all dimensions of the iteration...
CASES
2008
ACM
13 years 7 months ago
2008
ACM
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
LCPC
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Parallel loops account for the greatest percentage of program parallelism. The degree to which parallelism can be exploited and the amount of overhead involved during par...
TJS
2002
13 years 5 months ago
2002
This paper describes a tiling technique that can be used by application programmers and optimizing compilers to obtain I/O-efficient versions of regular scientific loop nests. Due ...
SCOPES
2004
Springer
13 years 11 months ago
2004
Springer
For mobile embedded systems, the energy consumption is a limiting factor because of today’s battery capacities. Besides the processor, memory accesses consume a high amount of en...