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» Optimizing dominant time constant in RC circuits
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PODC
2005
ACM
13 years 11 months ago
On the locality of bounded growth
Many large-scale networks such as ad hoc and sensor networks, peer-to-peer networks, or the Internet have the property that the number of independent nodes does not grow arbitrari...
Fabian Kuhn, Thomas Moscibroda, Roger Wattenhofer
JCO
2011
115views more  JCO 2011»
13 years 9 days ago
Approximation scheme for restricted discrete gate sizing targeting delay minimization
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...
Chen Liao, Shiyan Hu
IROS
2006
IEEE
97views Robotics» more  IROS 2006»
13 years 11 months ago
A quasi-passive model of human leg function in level-ground walking
- In this paper, we seek to understand how leg muscles and tendons work mechanically during walking in order to motivate the design of efficient robotic legs. We hypothesize that a...
Ken Endo, Daniel Paluska, Hugh M. Herr
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 5 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
14 years 2 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan