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CGO
2006
IEEE
13 years 9 months ago
Profiling over Adaptive Ranges
Modern computer systems are called on to deal with billions of events every second, whether they are instructions executed, memory locations accessed, or packets forwarded. This p...
Shashidhar Mysore, Banit Agrawal, Timothy Sherwood...
ICS
1999
Tsinghua U.
13 years 10 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
VLSID
2002
IEEE
123views VLSI» more  VLSID 2002»
14 years 6 months ago
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories
With the increased use of embedded/portable devices such as smart cellular phones, pagers, PDAs, hand-held computers, and CD players, improving energy efficiency is becoming a cri...
Victor Delaluz, Mahmut T. Kandemir, Narayanan Vija...
ECBS
1999
IEEE
138views Hardware» more  ECBS 1999»
13 years 10 months ago
Multi-Domain Surety Modeling and Analysis for High Assurance Systems
Engineering systems are becoming increasingly complex as state of the art technologies are incorporated into designs. Surety modeling and analysis is an emerging science which per...
James Davis, Jason Scott, Janos Sztipanovits, Marc...
CODES
2006
IEEE
13 years 11 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt