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DCC
2007
IEEE
14 years 5 months ago
Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...
Milena Milenkovic, Aleksandar Milenkovic, Martin B...
SIGMETRICS
2002
ACM
171views Hardware» more  SIGMETRICS 2002»
13 years 5 months ago
Characterizing the d-TLB behavior of SPEC CPU2000 benchmarks
Despite the numerous optimization and evaluation studies that have been conducted with TLBs over the years, there is still a deficiency in an indepth understanding of TLB characte...
Gokul B. Kandiraju, Anand Sivasubramaniam
DAC
1999
ACM
13 years 10 months ago
Common-Case Computation: A High-Level Technique for Power and Performance Optimization
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
Ganesh Lakshminarayana, Anand Raghunathan, Kamal S...
HPCA
2002
IEEE
14 years 6 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
TASE
2008
IEEE
13 years 5 months ago
Optimal Vibratory Stick-Slip Transport
Abstract--We describe a vibratory part transport mechanism that utilizes both static and dynamic friction to linearly transport parts in a horizontal direction. We derive a horizon...
Paul Umbanhowar, Kevin M. Lynch