Sciweavers

20 search results - page 1 / 4
» Optimizing the memory bandwidth with loop fusion
Sort
View
CODES
2004
IEEE
13 years 8 months ago
Optimizing the memory bandwidth with loop fusion
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
Paul Marchal, José Ignacio Gómez, Fr...
DSD
2004
IEEE
111views Hardware» more  DSD 2004»
13 years 8 months ago
Memory Requirement Optimization with Loop Fusion and Loop Shifting
Loop fusion and loop shifting are well recognized loop transformations for memory requirement reduction. Stateof-the-art optimizations with loop fusion and shifting are based on h...
Qubo Hu, Martin Palkovic, Per Gunnar Kjeldsberg
FPGA
2012
ACM
285views FPGA» more  FPGA 2012»
12 years 7 days ago
Optimizing SDRAM bandwidth for custom FPGA loop accelerators
Memory bandwidth is critical to achieving high performance in many FPGA applications. The bandwidth of SDRAM memories is, however, highly dependent upon the order in which address...
Samuel Bayliss, George A. Constantinides
ICS
2000
Tsinghua U.
13 years 8 months ago
Fast greedy weighted fusion
Loop fusion is important to optimizing compilers because it is an important tool in managing the memory hierarchy. By fusing loops that use the same data elements, we can reduce t...
Ken Kennedy
ASAP
2004
IEEE
89views Hardware» more  ASAP 2004»
13 years 8 months ago
Optimizing the Memory Bandwidth with Loop Morphing
José Ignacio Gómez, Paul Marchal, Sv...