20 search results - page 3 / 4 » Optimizing the memory bandwidth with loop fusion |
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
ASPLOS
1994
ACM
13 years 9 months ago
1994
ACM
In the past decade, processor speed has become significantly faster than memory speed. Small, fast cache memories are designed to overcome this discrepancy, but they are only effe...
CODES
2000
IEEE
13 years 9 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
ICS
2004
Tsinghua U.
13 years 10 months ago
2004
Tsinghua U.
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
IEEEPACT
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...