10 search results - page 1 / 2 » Optimum Power Performance Pipeline Depth |
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
The impact of pipeline length on both the power and performance of a microprocessor is explored both theoretically and by simulation. A theory is presented for a wide range of pow...
ISCA
2002
IEEE
13 years 10 months ago
2002
IEEE
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
MICRO
2002
IEEE
13 years 10 months ago
2002
IEEE
During the concept phase and definition of next generation high-end processors, power and performance will need to be weighted appropriately to deliver competitive cost/performan...
ICCD
2002
IEEE
14 years 1 months ago
2002
IEEE
A method of managing the power consumption of an embedded, single-issue processor by controlling its pipeline depth is proposed. The execution time will be increased but, if the m...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...